Invention Grant
- Patent Title: Reconfigurable multi-thread processor for simultaneous operations on split instructions and operands
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Application No.: US17214804Application Date: 2021-03-27
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Publication No.: US11782719B2Publication Date: 2023-10-10
- Inventor: Heonchul Park
- Applicant: Redpine Signals, Inc.
- Applicant Address: US CA San Jose
- Assignee: Ceremorphic, Inc.
- Current Assignee: Ceremorphic, Inc.
- Current Assignee Address: US CA San Jose
- Agency: File-EE-Patents.com
- Agent Jay A. Chesavage
- Main IPC: G06F9/38
- IPC: G06F9/38 ; G06F9/30
Abstract:
A superscalar processor has a thread mode of operation for supporting multiple instruction execution threads which are full data path wide instructions, and a micro-thread mode of operation where each thread supports two micro-threads which independently execute instructions. An executed instruction sets a micro-thread mode and an executed instruction sets the thread mode.
Public/Granted literature
- US20220308889A1 Reconfigurable Multi-Thread Processor for Simultaneous Operations on Split Instructions and Operands Public/Granted day:2022-09-29
Information query
