In an aspect, the memory device includes not limited to a memory array, a leakage current verifying circuit, and a controller. The controller is configured to perform an erase operation for a first column of memory cells connected to a first WL, set a verify condition including a leakage current threshold, perform a leakage current verifying operation for the first column of the memory cells by comparing a leakage current of a cell of the first column of the memory cells to the leakage current threshold, detect a failure of the first column in response to a cell having the leakage current being above the leakage current threshold, and perform a post-program operation to repair the failure of the first column of the memory cells.