Invention Grant
- Patent Title: Gate structures for semiconductor devices
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Application No.: US17461487Application Date: 2021-08-30
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Publication No.: US11854906B2Publication Date: 2023-12-26
- Inventor: Chun-Fai Cheng , Chang-Miao Liu , Kuan-Chung Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L29/06 ; H01L29/423 ; H01L29/49 ; H01L29/51 ; H01L29/786 ; H01L29/66 ; H01L21/02 ; H01L21/28 ; H01L21/311 ; H01L21/3115 ; H01L27/092

Abstract:
A semiconductor device with different gate structure configurations and a method of fabricating the semiconductor device are disclosed. The method includes depositing a high-K dielectric layer surrounding nanostructured channel regions, performing a first doping with a rare-earth metal (REM)-based dopant on first and second portions of the high-K dielectric layer, and performing a second doping with the REM-based dopants on the first portions of the high-K dielectric layer and third portions of the high-K dielectric layer. The first doping dopes the first and second portions of the high-K dielectric layer with a first REM-based dopant concentration. The second doping dopes the first and third portions of the high-K dielectric layer with a second REM-based dopant concentration different from the first REM-based dopant concentration. The method further includes depositing a work function metal layer on the high-K dielectric layer and depositing a metal fill layer on the work function metal layer.
Public/Granted literature
- US20210391225A1 GATE STRUCTURES FOR SEMICONDUCTOR DEVICES Public/Granted day:2021-12-16
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