Invention Grant
- Patent Title: Base layout cell
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Application No.: US17459485Application Date: 2021-08-27
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Publication No.: US11868697B2Publication Date: 2024-01-09
- Inventor: Shang-Hsuan Chiu , Chih-Liang Chen , Hui-Zhong Zhuang , Chi-Yu Lu , Kuang-Ching Chang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
- Current Assignee Address: TW Hsinchu
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: G06F30/00
- IPC: G06F30/00 ; G06F30/392

Abstract:
Systems, methods and devices are provided, which can include an engineering change order (ECO) base. A base layout cell includes metal layer regions, conductive gate patterns arranged above metal layer regions; oxide definition (OD) patterns, metal-zero layer over oxide-definition (metal-zero) patterns, at least one cut metal layer (CMD) pattern; and at least one via region. The base layout cell can be implemented in at least two non-identical functional cells. A first functional cell of the at least two non-identical functional cells includes first interconnection conductive patterns arranged connecting metal-zero structures corresponding to at least two metal-zero patterns in a first layout, and a second functional cell of the at least two non-identical functional cells includes second interconnection conductive patterns arranged connecting metal-zero structures corresponding to at least two metal-zero patterns in a second layout.
Public/Granted literature
- US20230068097A1 BASE LAYOUT CELL Public/Granted day:2023-03-02
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