- Patent Title: Wafer thickness, topography, and layer thickness metrology system
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Application No.: US17532308Application Date: 2021-11-22
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Publication No.: US11885609B2Publication Date: 2024-01-30
- Inventor: Wojciech Jan Walecki
- Applicant: Wojciech Jan Walecki
- Applicant Address: US FL Sunrise
- Assignee: Wojciech Jan Walecki
- Current Assignee: Wojciech Jan Walecki
- Current Assignee Address: US FL Sunrise
- Main IPC: G01B11/06
- IPC: G01B11/06 ; G01J3/42 ; G01J3/02

Abstract:
The invention describes a metrology system allowing for the reduction of the errors caused by vibration of the production floor and allowing for measurements of the thickness of wafers in motion. This is accomplished by performing simultaneous measurements of spectra containing interference signals containing distance information using a plurality of probes positioned on both sides of the measured wafer on the same detector at the same time or by means of plurality of synchronized detectors. System is also able to measure thickness of the individual optically accessible layers present in the sample.
Public/Granted literature
- US20230160687A1 Wafer thickness, topography, and layer thickness metrology system Public/Granted day:2023-05-25
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