Invention Grant
- Patent Title: Interleaved cache prefetching
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Application No.: US18117820Application Date: 2023-03-06
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Publication No.: US11886348B2Publication Date: 2024-01-30
- Inventor: Laurent Isenegger , Robert M. Walker , Cagdas Dirik
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F12/0862 ; G06F12/0831

Abstract:
A method includes receiving, at a direct memory access (DMA) controller of a memory device, a first command from a first cache controller coupled to the memory device to prefetch first data from the memory device and sending the prefetched first data, in response to receiving the first command, to a second cache controller coupled to the memory device. The method can further include receiving a second command from a second cache controller coupled to the memory device to prefetch second data from the memory device, and sending the prefetched second data, in response to receiving the second command, to a third cache controller coupled to the memory device.
Public/Granted literature
- US20230205701A1 INTERLEAVED CACHE PREFETCHING Public/Granted day:2023-06-29
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