Invention Grant
- Patent Title: Method for error handling of an interconnection protocol, controller and storage device
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Application No.: US17562729Application Date: 2021-12-27
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Publication No.: US11892927B2Publication Date: 2024-02-06
- Inventor: Fu Hsiung Lin
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Agency: William Park & Associates Ltd.
- Priority: TW 0130594 2021.08.19
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/30 ; G06F13/38 ; G06F11/07 ; H04L1/00

Abstract:
A method for error handling of an interconnection protocol, a controller, and a storage device are provided. The method includes receiving a frame error position indication signal to indicate whether an error occurs in a frame in each clock cycle and a symbol position corresponding to the error, and receiving a frame correction position indication signal to indicate whether the frame in each clock cycle is correct and a symbol position corresponding to the frame that is correct; according to the frame error position indication signal and the frame correction position indication signal, determining that a frame error occurs in a first clock cycle, and after requesting for NAC frame transmission, sending a request for disabling the NAC frame transmission; and after the first clock cycle, comparing the frame error position indication signal and the frame correction position indication signal.
Public/Granted literature
- US20230056001A1 METHOD FOR ERROR HANDLING OF AN INTERCONNECTION PROTOCOL, CONTROLLER AND STORAGE DEVICE Public/Granted day:2023-02-23
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