Invention Grant
- Patent Title: Semiconductor package structure
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Application No.: US17810625Application Date: 2022-07-04
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Publication No.: US11948895B2Publication Date: 2024-04-02
- Inventor: Tzu-Hung Lin , Chia-Cheng Chang , I-Hsuan Peng , Nai-Wei Liu
- Applicant: MEDIATEK INC.
- Applicant Address: TW Hsinchu
- Assignee: MEDIATEK INC.
- Current Assignee: MEDIATEK INC.
- Current Assignee Address: TW Hsinchu
- Agency: McClure, Qualey & Rodack, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/043 ; H01L23/13 ; H01L23/31 ; H01L23/498 ; H01L23/538 ; H01L25/065

Abstract:
A semiconductor package structure includes a substrate having a wiring structure. A first semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure. A second semiconductor die is disposed over the substrate and is electrically coupled to the wiring structure, wherein the first semiconductor die and the second semiconductor die are arranged side-by-side. Holes are formed on a surface of the substrate, wherein the holes are located within a projection of the first semiconductor die or the second semiconductor die on the substrate. Further, a molding material surrounds the first semiconductor die and the second semiconductor die, and surfaces of the first semiconductor die and the second semiconductor die facing away from the substrate are exposed by the molding material.
Public/Granted literature
- US20220336374A1 SEMICONDUCTOR PACKAGE STRUCTURE Public/Granted day:2022-10-20
Information query
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