Invention Grant
- Patent Title: High voltage semiconductor device including buried oxide layer
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Application No.: US18116826Application Date: 2023-03-02
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Publication No.: US12040396B2Publication Date: 2024-07-16
- Inventor: Sheng-Yao Huang , Yu-Ruei Chen , Zen-Jay Tsai , Yu-Hsiang Lin
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Priority: CN 2011177946.7 2020.10.29
- The original application number of the division: US17109153 2020.12.02
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/265 ; H01L21/28 ; H01L21/8234 ; H01L27/088 ; H01L29/06 ; H01L29/423 ; H01L29/66
Abstract:
A semiconductor structure includes a substrate, a buried oxide layer formed in the substrate and near a surface of the substrate, a gate dielectric layer formed on the substrate and covering the buried oxide layer, a gate structure formed on the gate dielectric layer and overlapping the buried oxide layer, and a source region and a drain region formed in the substrate and at two sides of the gate structure.
Public/Granted literature
- US20230207692A1 HIGH VOLTAGE SEMICONDUCTOR DEVICE INCLUDING BURIED OXIDE LAYER Public/Granted day:2023-06-29
Information query
IPC分类:
