Invention Grant
- Patent Title: Padding in flash memory blocks
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Application No.: US17897184Application Date: 2022-08-28
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Publication No.: US12057167B2Publication Date: 2024-08-06
- Inventor: Yu-Chung Lien , Zhenming Zhou , Murong Lang
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G11C16/12
- IPC: G11C16/12 ; G11C16/04 ; G11C16/08 ; G11C16/10

Abstract:
A method includes determining a boundary word line in a partial block of a flash memory device, where the partial block includes blank word lines after the boundary word line; determining a single predefined level of pure data to write in at least one of the blank word lines after the boundary word line; and writing the single predefined level of pure data to at least one of the blank word lines after the boundary word line.
Public/Granted literature
- US20240071503A1 PADDING IN FLASH MEMORY BLOCKS Public/Granted day:2024-02-29
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