Invention Grant
- Patent Title: Method for forming semiconductor memory device having a t-shaped erase gate
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Application No.: US18199967Application Date: 2023-05-21
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Publication No.: US12057481B2Publication Date: 2024-08-06
- Inventor: Liang Yi , Zhiguo Li , Xiaojuan Gao , Chi Ren
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Priority: TW 0128305 2021.08.02
- The original application number of the division: US17510371 2021.10.25
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L21/28 ; H01L29/66 ; H01L29/788

Abstract:
A method for forming a semiconductor memory device is disclosed. A substrate is provided. A source diffusion region is formed in the substrate. Two floating gates are on opposite sides of the source diffusion region. A first dielectric cap layer is formed directly on each of the floating gates. An erase gate is formed on the source diffusion region. The erase gate partially overlaps an upper inner corner of each of the floating gates. A second dielectric cap layer is formed on the erase gate and the first dielectric cap layer. A select gate is formed on a sidewall of the first dielectric cap layer in a self-aligned manner. A drain diffusion region is formed in the substrate and adjacent to the select gate.
Public/Granted literature
- US20230299160A1 METHOD FOR FORMING SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2023-09-21
Information query
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