- Patent Title: Method for manufacturing resistive random access memory structure
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Application No.: US18324709Application Date: 2023-05-26
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Publication No.: US12063875B2Publication Date: 2024-08-13
- Inventor: Yen-De Lee , Ching-Yung Wang , Chien-Hsiang Yu , Hung-Sheng Chen
- Applicant: Winbond Electronics Corp.
- Applicant Address: TW Taichung
- Assignee: WINBOND ELECTRONICS CORP.
- Current Assignee: WINBOND ELECTRONICS CORP.
- Current Assignee Address: TW Taichung
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Priority: TW 8130379 2019.08.26
- The original application number of the division: US16996552 2020.08.18
- Main IPC: H01L45/00
- IPC: H01L45/00 ; H10B63/00 ; H10N70/00

Abstract:
A method for manufacturing a resistive random access memory structure is provided. The method includes providing a substrate, and the substrate includes an array region and a peripheral region. The method includes forming a first low-k dielectric layer in the peripheral region, and the first low-k dielectric layer has a dielectric constant of less than 3. The method includes forming a plurality of memory cells on the substrate and in the array region. The method includes forming a dummy memory cell at a boundary between the array region and the peripheral region. The method includes forming a gap-filling dielectric layer on the substrate. The method includes forming a plurality of first conductive plugs in the gap-filling dielectric layer, and each of the plurality of first conductive plugs is in contact with one of the plurality of memory cells.
Public/Granted literature
- US20230301206A1 METHOD FOR MANUFACTURING RESISTIVE RANDOM ACCESS MEMORY STRUCTURE Public/Granted day:2023-09-21
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