Invention Grant
- Patent Title: Power saving floating point Multiplier-Accumulator with a high precision accumulation detection mode
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Application No.: US17352373Application Date: 2021-06-21
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Publication No.: US12079593B2Publication Date: 2024-09-03
- Inventor: Dylan Finch
- Applicant: Redpine Signals, Inc.
- Applicant Address: US CA San Jose
- Assignee: Ceremorphic, Inc.
- Current Assignee: Ceremorphic, Inc.
- Current Assignee Address: US CA San Jose
- Agency: File-EE-Patents.com
- Agent Jay A. Chesavage
- Main IPC: G06F7/544
- IPC: G06F7/544 ; G06F5/01 ; G06F7/485 ; G06F7/487

Abstract:
A floating point multiplier-accumulator (MAC) multiplies and accumulates N pairs of floating point values using N MAC processors operating simultaneously, each pair of values comprising an input value and a coefficient value to be multiplied and accumulated. The pairs of floating point values are simultaneously processed by the plurality of MAC processors, each of which output a signed integer form fraction with a first bitwidth and a second bitwidth, along with a maximum exponent. The first bitwidth signed integer form fractions are summed by an adder tree using the first bitwidth to form a first sum, and when an excess leading 0 condition is detected, a second adder tree operative on the second bitwidth integer form fractions forms a second sum. The first sum or second sum, along with the maximum exponent, is converted into floating point result.
Public/Granted literature
- US20220405053A1 Power Saving Floating Point Multiplier-Accumulator With a High Precision Accumulation Detection Mode Public/Granted day:2022-12-22
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