Invention Grant
- Patent Title: Semiconductor device and erasing method
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Application No.: US17988782Application Date: 2022-11-17
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Publication No.: US12080353B2Publication Date: 2024-09-03
- Inventor: Masaru Yano , Toshiaki Takeshita
- Applicant: Winbond Electronics Corp.
- Applicant Address: TW Taichung
- Assignee: Winbond Electronics Corp.
- Current Assignee: Winbond Electronics Corp.
- Current Assignee Address: TW Taichung
- Agency: JCIPRNET
- Priority: JP 21199805 2021.12.09
- Main IPC: G11C16/16
- IPC: G11C16/16 ; G11C16/04 ; G11C16/34

Abstract:
The disclosure provides a semiconductor device and an erasing method that may alleviate the deterioration of a memory cell caused by ISPE. The NAND flash memory in the disclosure includes a memory cell array and an erasing component that erases selected blocks of the memory cell array. The erasing component performs a first erasing verification (EV1) and a second erasing verification (EV2) on the selected block. When the first erasing verification (EV1) passes, and the second erasing verification (EV2) fails, an erase pulse with the same erase voltage as the last time is applied, and when the first erasing verification (EV1) fails, an erase pulse with a step voltage higher than the last time is applied.
Public/Granted literature
- US20230186997A1 SEMICONDUCTOR DEVICE AND ERASING METHOD Public/Granted day:2023-06-15
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