Invention Grant
- Patent Title: Piezo-resistive transistor based resonator with ferroelectric gate dielectric
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Application No.: US18130326Application Date: 2023-04-03
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Publication No.: US12113117B2Publication Date: 2024-10-08
- Inventor: Tanay Gosavi , Chia-ching Lin , Raseong Kim , Ashish Verma Penumatcha , Uygar Avci , Ian Young
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Essential Patents Group, LLP
- The original application number of the division: US16238420 2019.01.02
- Main IPC: H01L29/51
- IPC: H01L29/51 ; H01L27/088 ; H01L29/423 ; H01L29/78 ; H03H9/17

Abstract:
Describe is a resonator that uses ferroelectric (FE) materials in the gate of a transistor as a dielectric. The use of FE increases the strain/stress generated in the gate of the FinFET. Along with the usual capacitive drive, which is boosted with the increased polarization, FE material expands or contacts depending on the applied electric field on the gate of the transistor. As such, acoustic waves are generated by switching polarization of the FE materials. In some embodiments, the acoustic mode of the resonator is isolated using phononic gratings all around the resonator using the metal line above and vias' to body and dummy fins on the side. As such, a Bragg reflector is formed above the FE based transistor.
Public/Granted literature
- US20230238444A1 PIEZO-RESISTIVE TRANSISTOR BASED RESONATOR WITH FERROELECTRIC GATE DIELECTRIC Public/Granted day:2023-07-27
Information query
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