Invention Application
US20140076492A1 FABRICATION METHOD OF PACKAGING SUBSTRATE HAVING EMBEDDED CAPACITORS
审中-公开
包装嵌入式电容器的基板的制造方法
- Patent Title: FABRICATION METHOD OF PACKAGING SUBSTRATE HAVING EMBEDDED CAPACITORS
- Patent Title (中): 包装嵌入式电容器的基板的制造方法
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Application No.: US14084901Application Date: 2013-11-20
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Publication No.: US20140076492A1Publication Date: 2014-03-20
- Inventor: Chien-Kuang Lai , Chun-Chih Huang
- Applicant: UNIMICRON TECHNOLOGY CORPORATION
- Applicant Address: TW Taoyuan
- Assignee: UNIMICRON TECHNOLOGY CORPORATION
- Current Assignee: UNIMICRON TECHNOLOGY CORPORATION
- Current Assignee Address: TW Taoyuan
- Priority: TW100139804 20111101
- Main IPC: H01G4/30
- IPC: H01G4/30

Abstract:
A packaging substrate includes: a substrate having a core layer, a cavity penetrating the core layer and circuit layers formed on surfaces of the core layer; a first capacitor disposed in the cavity; a bonding layer formed on the first capacitor in the cavity of the substrate; a second capacitor disposed on the bonding layer so as to be received in the cavity; and a dielectric layer formed on the substrate and in the cavity for covering the first and second capacitors. By stacking the first and second capacitors in the cavity through the bonding layer, the single core layer is embedded with two layers of the capacitors to thereby meet the multi-function requirement.
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