Invention Application
- Patent Title: WORKLOAD ADAPTIVE SCANS FOR MEMORY SUB-SYSTEMS
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Application No.: US17867538Application Date: 2022-07-18
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Publication No.: US20220351796A1Publication Date: 2022-11-03
- Inventor: Renato C. Padilla , Sampath K. Ratnam , Christopher M. Smitchger , Vamsi Pavan Rayaprolu , Gary F. Besinga , Michael G. Miller , Tawalin Opastrakoon
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G11C29/10
- IPC: G11C29/10 ; G06F11/07

Abstract:
A method includes associating each block of a plurality of blocks of a memory device with a corresponding frequency access group of a plurality of frequency access groups based on corresponding access frequencies, and performing scan operations on blocks of each of the plurality of frequency access groups using a scan frequency that is different from scan frequencies of other frequency access groups. A scan operation performed on a frequency access group with a higher access frequency uses a higher scan frequency than a scan operation performed on a frequency access group with a lower access frequency.
Public/Granted literature
- US11715541B2 Workload adaptive scans for memory sub-systems Public/Granted day:2023-08-01
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