-
公开(公告)号：US20240256145A1
公开(公告)日：2024-08-01
申请号：US18634347
申请日：2024-04-12
Applicant: Micron Technology, Inc.
IPC: G06F3/06
CPC classification number: G06F3/0616 , G06F3/0653 , G06F3/0679
Abstract: A memory system includes a memory device and a processing device, operatively coupled to the memory device. The processing device performs operations comprising: identifying one or more mandatory scan wordlines of the memory device and one or more remaining wordlines of the memory device; performing a plurality of scan iterations with respect to a plurality of pages of the memory device, such that performing each scan iteration comprises: identifying, among the remaining wordlines, one or more scheduled scan wordlines of the memory device, scanning a subset of pages of the memory device that are addressable by the mandatory scan wordlines and the scheduled scan wordlines; wherein a combination of a first plurality of pages addressable by the scheduled scan wordlines selected by the plurality of scan iterations and a second plurality of pages addressable by the mandatory wordlines comprises the plurality of pages of the memory device.
-
公开(公告)号：US11923030B2
公开(公告)日：2024-03-05
申请号：US17888641
申请日：2022-08-16
Applicant: Micron Technology, Inc.
Inventor： Gary F. Besinga , Renato C. Padilla , Tawalin Opastrakoon , Sampath K. Ratnam , Michael G. Miller , Christopher M. Smitchger , Vamsi Pavan Rayaprolu , Ashutosh Malshe
CPC classification number: G11C29/44 , G11C16/10 , G11C16/26 , G11C29/42 , G11C29/50004 , G11C29/783
Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including initiating a read operation with respect to a block of the memory device, selecting, based on a set of criteria, a default read offset from a set of read offsets, wherein the set of criteria includes at least one of: a parameter related to trigger rate, or an amount of time that an open block is allowed to remain open to control threshold voltage shift due to storage charge loss, and applying the default read offset to a read operation performed with respect to the block.
-
公开(公告)号：US11756636B2
公开(公告)日：2023-09-12
申请号：US17939594
申请日：2022-09-07
Applicant: Micron Technology, Inc.
Inventor： Vamsi Pavan Rayaprolu , Christopher M. Smitchger
CPC classification number: G11C16/3431 , G11C16/04 , G11C16/0483 , G11C16/107 , G11C16/24 , G11C16/26 , G11C16/3404 , G11C16/3459
Abstract: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including determining a value of a data state metric associated with data stored in a part of a block of the memory device; responsive to determining that the value of the data state metric satisfies a first threshold criterion, determining a first value reflecting a voltage distribution metric associated with at least the part of the block; determining a second value reflecting at least one of a deterioration slope indicative of a data deterioration rate associated with a first portion of the memory device or an error rate associated with a second portion of the memory device; feeding the first value and the second value to a neural network; and receiving, from the neural network, an instruction to perform a media management operation.
-
4.发明授权公开(公告)号：US11495309B2
公开(公告)日：2022-11-08
申请号：US17123997
申请日：2020-12-16
Applicant: Micron Technology, Inc.
Inventor： Vamsi Pavan Rayaprolu , Christopher M. Smitchger
Abstract: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including determining a voltage distribution metric associated with a at least part of a block of the memory device; determining a threshold value for the voltage distribution metric associated with the block; and responsive to determining that the voltage distribution metric exceeds the threshold value, performing a media management operation with respect to the block.
-
公开(公告)号：US20220351796A1
公开(公告)日：2022-11-03
申请号：US17867538
申请日：2022-07-18
Applicant: Micron Technology, Inc.
Inventor： Renato C. Padilla , Sampath K. Ratnam , Christopher M. Smitchger , Vamsi Pavan Rayaprolu , Gary F. Besinga , Michael G. Miller , Tawalin Opastrakoon
Abstract: A method includes associating each block of a plurality of blocks of a memory device with a corresponding frequency access group of a plurality of frequency access groups based on corresponding access frequencies, and performing scan operations on blocks of each of the plurality of frequency access groups using a scan frequency that is different from scan frequencies of other frequency access groups. A scan operation performed on a frequency access group with a higher access frequency uses a higher scan frequency than a scan operation performed on a frequency access group with a lower access frequency.
-
Patent Agency Ranking
公开(公告)号：US11995320B2
公开(公告)日：2024-05-28
申请号：US17824562
申请日：2022-05-25
Applicant: Micron Technology, Inc.
IPC: G06F3/06
CPC classification number: G06F3/0616 , G06F3/0653 , G06F3/0679
Abstract: A memory system includes a memory device and a processing device, operatively coupled to the memory device. The processing device performs operations comprising: identifying one or more mandatory scan wordlines of the memory device and one or more remaining wordlines of the memory device; performing a plurality of scan iterations with respect to a plurality of pages of the memory device, such that performing each scan iteration comprises: identifying, among the remaining wordlines, one or more scheduled scan wordlines of the memory device, scanning a subset of pages of the memory device that are addressable by the mandatory scan wordlines and the scheduled scan wordlines; wherein a combination of a first plurality of pages addressable by the scheduled scan wordlines selected by the plurality of scan iterations and a second plurality of pages addressable by the mandatory wordlines comprises the plurality of pages of the memory device.
-
公开(公告)号：US11810631B2
公开(公告)日：2023-11-07
申请号：US17123993
申请日：2020-12-16
Applicant: Micron Technology, Inc.
Inventor： Vamsi Pavan Rayaprolu , Michael Sheperek , Christopher M. Smitchger
CPC classification number: G11C29/021 , G11C29/12005 , G11C29/44 , G11C29/50004 , G11C2207/2254
Abstract: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including determining a value of a data state metric of a memory page; responsive to the data state metric satisfying a first threshold criterion, determining a value of a voltage distribution metric associated with the page; and responsive to the voltage distribution metric value satisfying a second threshold criterion, performing a media management operation with respect to a block associated with the page.
-
公开(公告)号：US11715541B2
公开(公告)日：2023-08-01
申请号：US17867538
申请日：2022-07-18
Applicant: Micron Technology, Inc.
Inventor： Renato C. Padilla , Sampath K. Ratnam , Christopher M. Smitchger , Vamsi Pavan Rayaprolu , Gary F. Besinga , Michael G. Miller , Tawalin Opastrakoon
CPC classification number: G11C29/10 , G06F11/076 , G06F11/0736 , G06F11/0757 , G06F11/1048 , G11C29/52
Abstract: A method includes associating each block of a plurality of blocks of a memory device with a corresponding frequency access group of a plurality of frequency access groups based on corresponding access frequencies, and performing scan operations on blocks of each of the plurality of frequency access groups using a scan frequency that is different from scan frequencies of other frequency access groups. A scan operation performed on a frequency access group with a higher access frequency uses a higher scan frequency than a scan operation performed on a frequency access group with a lower access frequency.
-
公开(公告)号：US11456051B1
公开(公告)日：2022-09-27
申请号：US17212531
申请日：2021-03-25
Applicant: Micron Technology, Inc.
Inventor： Gary F. Besinga , Renato C. Padilla , Tawalin Opastrakoon , Sampath K. Ratnam , Michael G. Miller , Christopher M. Smitchger , Vamsi Pavan Rayaprolu , Ashutosh Malshe
Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including receiving a set of read offsets for a block of the memory device, the set of read offsets comprising a default read offset, selecting the default read offset from the set of read offsets based on one or more criteria, applying the default read offset to a read operation performed with respect to the block, determining that a second set of criteria associated with removing the default read offset is satisfied, and removing the default read offset responsive to determining that the second set of criteria is satisfied.
-
公开(公告)号：US20220199179A1
公开(公告)日：2022-06-23
申请号：US17127012
申请日：2020-12-18
Applicant: Micron Technology, Inc.
Inventor： Renato C. Padilla , Sampath K. Ratnam , Christopher M. Smitchger , Vamsi Pavan Rayaprolu , Gary F. Besinga , Michael G. Miller , Tawalin Opastrakoon
IPC: G11C29/10
Abstract: In one embodiment, a system maintains metadata associating each block of a plurality of blocks of the memory device with a corresponding frequency access group, where each frequency access group is associated with a corresponding scan frequency. The system determines that a first predetermined time period has elapsed since a last scan operation performed with respect to one or more blocks of the memory device, where the first predetermined time period specifies a first scan frequency. The system selects, based on the metadata, at least one block from a first frequency access group associated with the first scan frequency. The system performs a scan operation with respect to the selected block.
-
-
-
-
-
-
-
-
-
Search Results
30
records
(took 0.052 seconds)
