Invention Application
- Patent Title: SEMICONDUCTOR CHIP PACKAGE AND FABRICATION METHOD THEREOF
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Application No.: US17901849Application Date: 2022-09-01
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Publication No.: US20230005808A1Publication Date: 2023-01-05
- Inventor: Yi-Lin Tsai , Yi-Jou Lin , I-Hsuan Peng , Wen-Sung Hsu
- Applicant: MEDIATEK INC.
- Applicant Address: TW Hsin-Chu
- Assignee: MEDIATEK INC.
- Current Assignee: MEDIATEK INC.
- Current Assignee Address: TW Hsin-Chu
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L25/065 ; H01L23/00 ; H01L21/56
Abstract:
A semiconductor chip package includes a substrate having a top surface and a bottom surface, and a semiconductor device mounted on the top surface of the substrate. A gap is provided between the semiconductor device and the top surface of the substrate. A multi-layer laminate epoxy sheet is disposed on the top surface of the substrate and around a perimeter of the semiconductor device.
Public/Granted literature
- US11854930B2 Semiconductor chip package and fabrication method thereof Public/Granted day:2023-12-26
Information query
IPC分类:
