Invention Publication
- Patent Title: TEST CIRCUIT
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Application No.: US17440114Application Date: 2021-07-07
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Publication No.: US20230197179A1Publication Date: 2023-06-22
- Inventor: MinNa LI
- Applicant: ChangXin Memory Technolagies, Inc.
- Applicant Address: CN Hefei City
- Assignee: ChangXin Memory Technolagies, Inc.
- Current Assignee: ChangXin Memory Technolagies, Inc.
- Current Assignee Address: CN Hefei City
- Priority: CN 2110160891.7 2021.02.05
- International Application: PCT/CN2021/105067 2021.07.07
- Date entered country: 2021-09-16
- Main IPC: G11C29/38
- IPC: G11C29/38 ; G11C29/18

Abstract:
This application provides a test circuit. The circuit includes: an input terminal, a processing circuit, and an output terminal. The input terminal receives an input signal. The input signal includes a test command for indicating a test target circuit module and an address of the target circuit module. The processing circuit responds to the test command and the target. The address of the circuit module determines the test mode signal, the test mode signal carries the test type, the test mode signal is used to trigger the target circuit module to perform the test corresponding to the test type, and the output terminal sends the test mode signal to the target circuit module according to the address of the target circuit module. Thus, the test mode signal can be accurately transmitted to different circuit modules in the memory chip.
Public/Granted literature
- US11894087B2 Test circuit Public/Granted day:2024-02-06
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