Invention Grant
US5901293A Bus interface controller for serially-accessed variable-access-time memory device 失效
总线接口控制器,用于串行访问可变存取时存储器件

Bus interface controller for serially-accessed variable-access-time
memory device
Abstract:
A method and controller circuitry for coupling a variable access time serial memory device to a microprocessor is disclosed. The controller circuitry includes an input for receiving address signal lines and control signal lines generated by the microprocessor, control signal lines generated by the device, and control signal lines and data signal lines for sending signals to the microprocessor and to the device. The controller circuitry further includes a decoder, responsive to the received address signal lines and control signal lines, for determining if the device can immediately respond to the microprocessor-generated request. If the device can respond to the request immediately the controller circuitry signals the device to respond to the request; otherwise, the controller circuitry responds to the request, and sends signals to the device to prepare the device to respond to future microprocessor-generated requests. The controller circuitry further includes memory to allow it to alter its responses to the microprocessor and its signals to the device dependent upon prior signals it has sent and received.
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