Invention Grant
US5963496A Sense amplifier with zero power idle mode 失效
具有零功率空闲模式的感应放大器

Sense amplifier with zero power idle mode
Abstract:
A sense amplifier for use in a serial configuration memory includes multiple stages which are enabled and disabled in a controller manner, in response to a control pulse. The control pulse is produced every Nth period of an externally provided clock signal, the clock being used to clock out a bitstream representing the contents of the memory device. In a preferred embodiment, N such sense amps are utilized to read out in parallel fashion the N memory cells (bits) that constitute an accessed memory location. The sense amps are therefore active only of a period of time sufficient to read out a memory cell.
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