Invention Grant
- Patent Title: Flip chip in leaded molded package with two dies
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Application No.: US10834752Application Date: 2004-04-28
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Publication No.: US07029947B2Publication Date: 2006-04-18
- Inventor: Rajeev Joshi
- Applicant: Rajeev Joshi
- Applicant Address: US ME South Portland
- Assignee: Fairchild Semiconductor Corporation
- Current Assignee: Fairchild Semiconductor Corporation
- Current Assignee Address: US ME South Portland
- Agency: Townsend and Townsend and Crew LLP
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/48 ; H01L21/50
Abstract:
A chip device including two stacked dies. The chip device includes a leadframe that includes a plurality of leads. A first die is coupled to a first side of the leadframe with solder and a second die is coupled to a second side of the leadframe with solder. A molded body surrounds at least a portion of the leadframe and the dies.
Public/Granted literature
- US20040201086A1 Flip chip in leaded molded package with two dies Public/Granted day:2004-10-14
Information query
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