Invention Grant
- Patent Title: Socket connection test modules and methods of using the same
- Patent Title (中): 套接字连接测试模块及使用方法
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Application No.: US11223248Application Date: 2005-09-06
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Publication No.: US07208967B2Publication Date: 2007-04-24
- Inventor: Swee Cheng Ho , Teik Sean Toh , Tzyy Haw Tan
- Applicant: Swee Cheng Ho , Teik Sean Toh , Tzyy Haw Tan
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G01R31/02
- IPC: G01R31/02

Abstract:
Test modules, systems, and methods employing capacitors for the testing of the solder joint connections between a printed circuit board (PCB) and a socket of a device are presented in embodiments of the current invention. A test module having capacitors in parallel, and in particular embedded capacitors, can be used to test tied traces and their solder joint connections by measuring the total capacitance of the capacitors. Embodiments of the current invention present no-power tests that can be used with a variety of testing platforms and test fixtures, such as in-circuit testing (ICT) and manufacturing defect analysis (MDA.) Additionally, the test module can be used with a variety of sockets, such as a ball grid array, a pinned grid array, and a land grid array.
Public/Granted literature
- US20060006893A1 Socket connection test modules and methods of using the same Public/Granted day:2006-01-12
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