Invention Grant
US07669320B2 Coreless cavity substrates for chip packaging and their fabrication
有权
用于芯片封装的无芯腔基板及其制造
- Patent Title: Coreless cavity substrates for chip packaging and their fabrication
- Patent Title (中): 用于芯片封装的无芯腔基板及其制造
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Application No.: US11737269Application Date: 2007-04-19
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Publication No.: US07669320B2Publication Date: 2010-03-02
- Inventor: Dror Hurwitz , Mordechay Farkash , Eva Igner , Boris Statnikov , Benny Michaeli
- Applicant: Dror Hurwitz , Mordechay Farkash , Eva Igner , Boris Statnikov , Benny Michaeli
- Applicant Address: IL Migdal HaEmek
- Assignee: Amitec-Advanced Multilayer Interconnect Technologies Ltd.
- Current Assignee: Amitec-Advanced Multilayer Interconnect Technologies Ltd.
- Current Assignee Address: IL Migdal HaEmek
- Agency: Dennison, Schultz & MacDonald
- Priority: IL175011 20060420
- Main IPC: H05K3/10
- IPC: H05K3/10
Abstract:
A method for fabricating an IC support for supporting a first IC die connected in series with a second IC die; the IC support comprising a stack of alternating layers of copper features and vias in insulating surround, the first IC die being bondable onto the IC support, and the second IC die being bondable within a cavity inside the IC support, wherein the cavity is formed by etching away a copper base and selectively etching away built up copper.
Public/Granted literature
- US20070289127A1 CORELESS CAVITY SUBSTRATES FOR CHIP PACKAGING AND THEIR FABRICATION Public/Granted day:2007-12-20
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