Invention Grant
- Patent Title: Stacked structure for forming damascene structure
- Patent Title (中): 用于形成镶嵌结构的堆叠结构
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Application No.: US11322140Application Date: 2005-12-28
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Publication No.: US07675178B2Publication Date: 2010-03-09
- Inventor: Chin-Hsiang Lin , Chih-Chien Liu
- Applicant: Chin-Hsiang Lin , Chih-Chien Liu
- Applicant Address: TW Hsinchu
- Assignee: United Microelectronics Corp.
- Current Assignee: United Microelectronics Corp.
- Current Assignee Address: TW Hsinchu
- Agency: J.C. Patents
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40

Abstract:
A method of fabricating a stacked structure for forming a damascene process is described. A doped dielectric layer is formed on a substrate. A surface treatment is performed to the dielectric layer to make the dopant concentration in an upper surface layer of the dielectric layer lower than that in the other portions of the dielectric layer. A metal hard mask is then formed on the dielectric layer. Since the dopant conc. in the upper surface layer of the dielectric layer is lowered, the reaction between the metal hard mask and the dopant in the dielectric layer can be inhibited.
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