Invention Grant
- Patent Title: Two parallel engines for high speed transmit IPsec processing
- Patent Title (中): 两个并行引擎，用于高速传输IPsec处理
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Application No.: US10791557Application Date: 2004-03-02
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Publication No.: US07685434B2Publication Date: 2010-03-23
- Inventor: Marufa Kaniz , Jeffrey Dwork , Robert Alan Williams , Mohammad Y. Maniar , Somnath Viswanath
- Applicant: Marufa Kaniz , Jeffrey Dwork , Robert Alan Williams , Mohammad Y. Maniar , Somnath Viswanath
- Applicant Address: US CA Sunnyvale
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Eschweiler & Associates, LLC
- Main IPC: G06F21/00
- IPC: G06F21/00 ; G06F11/30
Abstract:
The invention relates to a network interface system for interfacing a host system with a network. The network interface system includes a bus interface system, a media access control system, and a security system. The network interface offloads IPsec processing from the host processor. According to the invention, the security system includes two processors for encrypting and authenticating the outgoing data. Outgoing data packets are sent alternately to one or the other processor, whereby transmission processing can be accelerated relative to receive processing.
Public/Granted literature
- US20050198531A1 Two parallel engines for high speed transmit IPSEC processing Public/Granted day:2005-09-08
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