Invention Grant
US07709275B2 Method of forming a pattern for a semiconductor device and method of forming the related MOS transistor 有权
形成半导体器件的图案的方法和形成相关的MOS晶体管的方法

Method of forming a pattern for a semiconductor device and method of forming the related MOS transistor
Abstract:
A method of forming a pattern for a semiconductor device, in which, two hard masks are included between an upper spin-on glass (SOG) layer and a lower etching target layer. The SOG layer is etched twice through two different patterned photoresists respectively to form a fine pattern in the SOG layer. Subsequently, an upper hard mask is etched by utilizing the patterned SOG layer as an etching mask so the upper patterned hard mask can have a fine pattern with a sound shape and enough thickness. A lower hard mask and the etching target layer are thereafter etched by utilizing the upper patterned hard mask as an etching mask, so portions of the etching target layer that are covered by the two hard masks can be well protected from the etching processes.
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