Invention Grant
US07709275B2 Method of forming a pattern for a semiconductor device and method of forming the related MOS transistor
有权
形成半导体器件的图案的方法和形成相关的MOS晶体管的方法
- Patent Title: Method of forming a pattern for a semiconductor device and method of forming the related MOS transistor
- Patent Title (中): 形成半导体器件的图案的方法和形成相关的MOS晶体管的方法
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Application No.: US12101122Application Date: 2008-04-10
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Publication No.: US07709275B2Publication Date: 2010-05-04
- Inventor: Min-Chieh Yang , Lung-En Kuo
- Applicant: Min-Chieh Yang , Lung-En Kuo
- Applicant Address: TW Hsin-Chu
- Assignee: United Microelectronics Corp.
- Current Assignee: United Microelectronics Corp.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A method of forming a pattern for a semiconductor device, in which, two hard masks are included between an upper spin-on glass (SOG) layer and a lower etching target layer. The SOG layer is etched twice through two different patterned photoresists respectively to form a fine pattern in the SOG layer. Subsequently, an upper hard mask is etched by utilizing the patterned SOG layer as an etching mask so the upper patterned hard mask can have a fine pattern with a sound shape and enough thickness. A lower hard mask and the etching target layer are thereafter etched by utilizing the upper patterned hard mask as an etching mask, so portions of the etching target layer that are covered by the two hard masks can be well protected from the etching processes.
Public/Granted literature
- US20090258500A1 METHOD OF FORMING A PATTERN FOR A SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE RELATED MOS TRANSISTOR Public/Granted day:2009-10-15
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