Invention Grant
- Patent Title: Semiconductor testing method and semiconductor tester
- Patent Title (中): 半导体测试方法和半导体测试仪
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Application No.: US11834207Application Date: 2007-08-06
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Publication No.: US07732791B2Publication Date: 2010-06-08
- Inventor: Tohru Ando , Yasuhiko Nara , Tsutomu Saito , Shinichi Kato , Takeshi Sunaoshi
- Applicant: Tohru Ando , Yasuhiko Nara , Tsutomu Saito , Shinichi Kato , Takeshi Sunaoshi
- Applicant Address: JP Tokyo
- Assignee: Hitachi High-Technologies Corporation
- Current Assignee: Hitachi High-Technologies Corporation
- Current Assignee Address: JP Tokyo
- Agency: Crowell & Moring LLP
- Priority: JP2006-238757 20060904
- Main IPC: H01J49/00
- IPC: H01J49/00 ; G06K9/00 ; G06K9/62

Abstract:
A semiconductor testing method capable of quickly counting semiconductor cells in which a seemingly horizontal or vertical line is drawn with a mouse, and raster rotation is performed in alignment with the closer axis. After that, the stage is horizontally moved, pattern matching is performed on an image on a position where the image should be disposed, and an angle is adjusted. The stage is moved evenly along the X-axis and the Y-axis, achieving a movement to a destination like a straight line. In synchronization with the smooth movement of the stage, a cell is surrounded in a rectangular frame by a ruler, and the number of cells is displayed with a numeric value.
Public/Granted literature
- US20080237462A1 Semiconductor Testing Method and Semiconductor Tester Public/Granted day:2008-10-02
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