Invention Grant
- Patent Title: Printed circuit board and method for decreasing impedance of a power source thereof
- Patent Title (中): 印刷电路板及其电源阻抗降低的方法
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Application No.: US10906073Application Date: 2005-02-02
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Publication No.: US07797824B2Publication Date: 2010-09-21
- Inventor: Thonas Su
- Applicant: Thonas Su
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Patterson & Sheridan, LLP
- Priority: TW93129644A 20040930
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H05K3/00

Abstract:
A method for decreasing impedance of a power source in a printed circuit board includes: (a) forming a first metal plane over a first layer of the printed circuit board; (b) forming a second metal plane and a third metal plane over a second layer of the printed circuit board; (c) forming a dielectric layer between the first layer and the second layer of the printed circuit board for insulating the first layer from the second layer; and (d) connecting the second metal plane to an electric potential different from an electric potential of the first metal plane and the third metal plane.
Public/Granted literature
- US20060068582A1 METHOD FOR DECREASING IMPEDANCE OF A POWER SOURCE IN A PRINTED CIRCUIT BOARD Public/Granted day:2006-03-30
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