Invention Grant
US07812436B2 Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
有权
在芯片上贴合集成电路芯片上堆叠线焊集成电路芯片的方法
- Patent Title: Methods for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
- Patent Title (中): 在芯片上贴合集成电路芯片上堆叠线焊集成电路芯片的方法
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Application No.: US12197453Application Date: 2008-08-25
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Publication No.: US07812436B2Publication Date: 2010-10-12
- Inventor: James M. Wark
- Applicant: James M. Wark
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L23/02
- IPC: H01L23/02
Abstract:
An inventive electronic device, such as a multi-chip module (MCM), a Single In-line Memory Module (SIMM), or a Dual In-line Memory Module (DIMM), includes a base, such as a printed circuit board, having a surface on which flip-chip pads and wire-bondable pads are provided. The flip-chip pads define an area on the surface of the base at least partially bounded by the wire-bondable pads. A first integrated circuit (IC) die is flip-chip bonded to the flip-chip pads, and a second IC die is back-side attached to the first IC die and ten wire-bonded to the wire-bondable pads. As a result, the flip-chip mounted first IC die is stacked with the second IC die in a simple, novel manner.
Public/Granted literature
- US20080315435A1 METHODS FOR STACKING WIRE-BONDED INTEGRATED CIRCUIT DICE ON FLIP-CHIP BONDED INTEGRATED CIRCUIT DICE Public/Granted day:2008-12-25
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