Invention Grant
US07829916B2 Transistor with a germanium-based channel encased by a gate electrode and method for producing one such transistor
有权
具有由栅电极封装的锗基通道的晶体管和用于制造这种晶体管的方法
- Patent Title: Transistor with a germanium-based channel encased by a gate electrode and method for producing one such transistor
- Patent Title (中): 具有由栅电极封装的锗基通道的晶体管和用于制造这种晶体管的方法
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Application No.: US11920835Application Date: 2006-05-23
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Publication No.: US07829916B2Publication Date: 2010-11-09
- Inventor: Yves Morand , Thierry Poiroux , Maud Vinet
- Applicant: Yves Morand , Thierry Poiroux , Maud Vinet
- Applicant Address: FR Paris
- Assignee: Commissariat a L'Energie Atomique
- Current Assignee: Commissariat a L'Energie Atomique
- Current Assignee Address: FR Paris
- Agency: Oliff & Berridge, PLC
- Priority: FR0505700 20050606
- International Application: PCT/FR2006/001177 WO 20060523
- International Announcement: WO2006/131615 WO 20061214
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/44

Abstract:
Source and drain electrodes are each formed by an alternation of first and second layers made from a germanium and silicon compound. The first layers have a germanium concentration comprised between 0% and 10% and the second layers have a germanium concentration comprised between 10% and 50%. At least one channel connects two second layers respectively of the source electrode and drain electrode. The method comprises etching of source and drain zones, connected by a narrow zone, in a stack of layers. Then superficial thermal oxidation of said stack is performed so a to oxidize the silicon of the germanium and silicon compound having a germanium concentration comprised between 10% and 50% and to condense the germanium Ge. The oxidized silicon of the narrow zone is removed and a gate dielectric and a gate are deposited on the condensed germanium of the narrow zone.
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