Invention Grant
US07840786B2 Techniques for storing instructions and related information in a memory hierarchy 有权
用于将指令和相关信息存储在存储器层次结构中的技术

  • Patent Title: Techniques for storing instructions and related information in a memory hierarchy
  • Patent Title (中): 用于将指令和相关信息存储在存储器层次结构中的技术
  • Application No.: US11735567
    Application Date: 2007-04-16
  • Publication No.: US07840786B2
    Publication Date: 2010-11-23
  • Inventor: David Neal Suggs
  • Applicant: David Neal Suggs
  • Applicant Address: US CA Sunnyvale
  • Assignee: Advanced Micro Devices, Inc.
  • Current Assignee: Advanced Micro Devices, Inc.
  • Current Assignee Address: US CA Sunnyvale
  • Main IPC: G06F9/30
  • IPC: G06F9/30
Techniques for storing instructions and related information in a memory hierarchy
Abstract:
A memory subsystem includes a first memory, a second memory, a first compressor, and a first decompressor. The first memory is configured to store instruction bytes of a fetch window and to store first predecode information and first branch information that characterizes the instruction bytes of the fetch window. The second memory is configured to store the instruction bytes of the fetch window upon eviction of the instruction bytes from the first memory and to store combined predecode/branch information that also characterizes the instruction bytes of the fetch window. The first compressor is configured to compress the first predecode information and the first branch information into the combined predecode/branch information. The first decompressor is configured to decode at least some of the instruction bytes stored in the second memory to convert the combined predecode/branch information into second predecode information, which corresponds to an uncompressed version of the first predecode information, for storage in the third memory.
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