Invention Grant
- Patent Title: Analog comparator comprising a digital offset compensation
- Patent Title (中): 模拟比较器包括数字偏移补偿
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Application No.: US12270983Application Date: 2008-11-14
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Publication No.: US07884650B2Publication Date: 2011-02-08
- Inventor: Sreenivasa Chalamala , Matthias Baer
- Applicant: Sreenivasa Chalamala , Matthias Baer
- Applicant Address: US TX Austin
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US TX Austin
- Agency: Williams, Morgan & Amerson, P.C.
- Priority: DE102008016428 20080331
- Main IPC: H03K5/22
- IPC: H03K5/22
Abstract:
A digital compensation of an input stage of a comparator may be achieved by providing switched load elements, which may be appropriately connected to the differential input pair of the comparator in order to match transistor characteristics of the input pair and also match the load value of the input stage. Thus, enhanced offset behavior may be accomplished without providing an external signal and/or without requiring complex reference voltages/currents.
Public/Granted literature
- US20090243663A1 ANALOG COMPARATOR COMPRISING A DIGITAL OFFSET COMPENSATION Public/Granted day:2009-10-01
Information query
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