Invention Grant
- Patent Title: Laminate substrate and semiconductor package utilizing the substrate
- Patent Title (中): 利用基板的层叠基板和半导体封装
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Application No.: US12133841Application Date: 2008-06-05
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Publication No.: US07919851B2Publication Date: 2011-04-05
- Inventor: Wen-Jeng Fan
- Applicant: Wen-Jeng Fan
- Applicant Address: TW Hsinchu
- Assignee: Powertech Technology Inc.
- Current Assignee: Powertech Technology Inc.
- Current Assignee Address: TW Hsinchu
- Agency: Muncy, Geissler, Olds & Lowe, PLLC
- Main IPC: H01L23/12
- IPC: H01L23/12

Abstract:
A laminated substrate and the semiconductor package utilizing the substrate are revealed. The laminated substrate primarily comprises a core layer, a first metal layer and a first solder mask disposed on the bottom surface of the core layer, and a second metal layer and a second solder mask disposed on the top surface of the core layer. The two solder masks have different CTEs to compensate potential substrate warpage caused by thermal stresses. Therefore, the manufacturing cost of the substrate can be reduced without adding extra stiffeners nor changing thicknesses of semiconductor packages to suppress substrate warpage during packaging processes. Especially, a die-attaching layer partially covers the second solder mask by printing and is planar after pre-curing for zero-gap die-attaching.
Public/Granted literature
- US20090302485A1 LAMINATE SUBSTRATE AND SEMICONDUCTOR PACKAGE UTILIZING THE SUBSTRATE Public/Granted day:2009-12-10
Information query
IPC分类: