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US07934109B2 Low power mode unipolar current/voltage mode interface 有权
低功耗模式单极性电流/电压模式接口

Low power mode unipolar current/voltage mode interface
Abstract:
Embodiments of a power consumption reduction process for memory interfaces are described. A power management process reduces the amount of time that current flows in a high or low terminated, current or voltage mode unipolar bus interface by reducing the amount of time the bus remains in a logic state that requires current flow.
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