Invention Grant
- Patent Title: Matched-impedance connector footprints
- Patent Title (中): 匹配阻抗连接器脚印
-
Application No.: US12604459Application Date: 2009-10-23
-
Publication No.: US07935896B2Publication Date: 2011-05-03
- Inventor: Danny L. C. Morlion , Stefaan Sercu , Winnie Heyvaert , Jan DeGeest
- Applicant: Danny L. C. Morlion , Stefaan Sercu , Winnie Heyvaert , Jan DeGeest
- Applicant Address: FR Guyancourt
- Assignee: FCI
- Current Assignee: FCI
- Current Assignee Address: FR Guyancourt
- Agency: Woodcock Washburn LLP
- Main IPC: H05K1/11
- IPC: H05K1/11

Abstract:
Disclosed are methodologies for defining matched-impedance footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component. The via arrangement may be also be altered to limit cross-talk among neighboring signal conductors. Thus, the via arrangement may be defined to balance the impedance, cross-talk, and routing density requirements of the system.
Public/Granted literature
- US20100041256A1 Matched-Impedance Connector Footprints Public/Granted day:2010-02-18
Information query