Invention Grant
- Patent Title: Semiconductor device and semiconductor device manufacturing method
- Patent Title (中): 半导体器件和半导体器件制造方法
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Application No.: US12379364Application Date: 2009-02-19
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Publication No.: US07936075B2Publication Date: 2011-05-03
- Inventor: Tsuyoshi Eda
- Applicant: Tsuyoshi Eda
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Foley & Lardner LLP
- Priority: JP2008-054528 20080305
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
The present invention provides a semiconductor device for which thermal stress at mounting is reduced and a reduction in reliability with regard to moisture absorption is prevented. The semiconductor device includes a uppermost metal layer 12, a solder bump 17, metals 15 and 16 which connect an uppermost metal layer 12 and the solder bump 17, and, a polyimide multilayer 14 having formed therein an opening 14x in which the metals 15 and 16 are provided. The polyimide multilayer 14 includes a first polyimide layer 14A and a second polyimide layer 14B formed on the first polyimide layer 14A. The second polyimide layer 14B is softer than the first polyimide layer 14A. A thermal stress at mounting is reduced by the second polyimide layer 14B. Since the first polyimide layer 14A has a higher strength than the second polyimide layer 14B, even if cracking occurs in the second polyimide layer 14B, the cracks are prevented from developing in the first polyimide layer 14A.
Public/Granted literature
- US20090224375A1 Semiconductor device and semiconductor device manufacturing method Public/Granted day:2009-09-10
Information query
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