Invention Grant
- Patent Title: Data processing device with low-power cache access mode
- Patent Title (中): 具有低功耗缓存访问模式的数据处理设备
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Application No.: US11743388Application Date: 2007-05-02
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Publication No.: US07941683B2Publication Date: 2011-05-10
- Inventor: Alex Branover , Frank P. Helms , Maurice Steinman
- Applicant: Alex Branover , Frank P. Helms , Maurice Steinman
- Applicant Address: US CA Sunnyvale
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Sunnyvale
- Main IPC: G06F1/00
- IPC: G06F1/00

Abstract:
A processor can operate in three different modes. In an active mode, a first voltage is provided to the processor, where the first voltage is sufficient to allow the processor to execute instructions. In a low-power mode, a retention voltage is provided to the processor. The processor consumes less power in the retention mode than in the active mode. In addition, the processor can operate in a third mode, where a voltage is provided to the processor sufficient to allow the processor to process cache messages, such as coherency messages, but not execute other normal operations or perform normal operations at a very low speed relative to their performance in the active mode.
Public/Granted literature
- US20080276236A1 DATA PROCESSING DEVICE WITH LOW-POWER CACHE ACCESS MODE Public/Granted day:2008-11-06
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