Invention Grant
- Patent Title: Fast evaluation of average critical area for ic layouts
- Patent Title (中): 快速评估ic布局的平均关键区域
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Application No.: US12032299Application Date: 2008-02-15
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Publication No.: US07962873B2Publication Date: 2011-06-14
- Inventor: Qing Su , Subarnarekha Sinha , Charles C. Chiang
- Applicant: Qing Su , Subarnarekha Sinha , Charles C. Chiang
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Haynes Beffel & Wolfeld LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Method and apparatus for approximating the average critical area of a layout or layout region, involving summing, over all the object segments of interest, respective critical area contribution values that are dependent upon particular layout parameters of the objects, each of the contribution values being representative of a plurality of defect sizes, and being defined such that for each defect size in the plurality of defect sizes, and for a particular defect type, the contribution values collectively count all critical areas arising due to the object segments of interest only once.
Public/Granted literature
- US20080216028A1 FAST EVALUATION OF AVERAGE CRITICAL AREA FOR IC Public/Granted day:2008-09-04
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