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US08054115B2 Phase-locked loop integrated circuits having dual feedback control 有权
具有双重反馈控制的锁相环集成电路

Phase-locked loop integrated circuits having dual feedback control
Abstract:
Phase-locked loop (PLL) integrated circuits according to embodiments of the invention provide dual feedback control. The first feedback control utilizes a conventional phase locking scheme that passes a feedback clock signal to an input of a phase-frequency detector (PFD). The second feedback control utilizes an automatic frequency calibrator that evaluates a frequency of an output of a voltage-controlled oscillator (VCO) relative to a locked frequency detected during calibration and provides separate calibration control to a charge pump.
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