Invention Grant
- Patent Title: Semiconductor assembly and multilayer wiring board
- Patent Title (中): 半导体组件和多层布线板
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Application No.: US12674081Application Date: 2008-11-11
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Publication No.: US08283570B2Publication Date: 2012-10-09
- Inventor: Yoshihiro Tomura , Shigeru Kondou , Teppei Iwase
- Applicant: Yoshihiro Tomura , Shigeru Kondou , Teppei Iwase
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2007-334142 20071226
- International Application: PCT/JP2008/003248 WO 20081111
- International Announcement: WO2009/081518 WO 20090702
- Main IPC: H05K1/00
- IPC: H05K1/00

Abstract:
A semiconductor assembly includes a multilayer wiring board including at least three insulating layers, first, second and third insulating layers and a semiconductor device attached to one principal surface of the first insulating layer. The first, second and third insulating layers are stacked in this order. The multilayer wiring board further includes a heat-insulating member made of a material having a lower thermal conductivity than the insulating layers. The heat-insulating member is disposed between the first and second insulating layers or next to the first insulating layer at a side opposite to the one principal surface.
Public/Granted literature
- US20110279996A1 SEMICONDUCTOR ASSEMBLY AND MULTILAYER WIRING BOARD Public/Granted day:2011-11-17
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