Invention Grant
US08356166B2 Minimizing code duplication in an unbounded transactional memory system by using mode agnostic transactional read and write barriers
有权
通过使用模式不可知事务读写障碍来最大限度地减少无界事务内存系统中的代码重复
- Patent Title: Minimizing code duplication in an unbounded transactional memory system by using mode agnostic transactional read and write barriers
- Patent Title (中): 通过使用模式不可知事务读写障碍来最大限度地减少无界事务内存系统中的代码重复
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Application No.: US12493168Application Date: 2009-06-26
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Publication No.: US08356166B2Publication Date: 2013-01-15
- Inventor: Ali-Reza Adl-Tabatabai , Bratin Saha , Gad Sheaffer , Vadim Bassin , Robert Y. Geva , Martin Taillefer , Darek Mihocka , Burton Jordan Smith , Jan Gray
- Applicant: Ali-Reza Adl-Tabatabai , Bratin Saha , Gad Sheaffer , Vadim Bassin , Robert Y. Geva , Martin Taillefer , Darek Mihocka , Burton Jordan Smith , Jan Gray
- Applicant Address: US WA Redmond
- Assignee: Microsoft Corporation
- Current Assignee: Microsoft Corporation
- Current Assignee Address: US WA Redmond
- Agency: Workman Nydegger
- Main IPC: G06F15/00
- IPC: G06F15/00 ; G06F9/00 ; G06F9/44 ; G06F7/38
Abstract:
Minimizing code duplication in an unbounded transactional memory system. A computing apparatus including one or more processors in which it is possible to use a set of common mode-agnostic TM barrier sequences that runs on legacy ISA and extended ISA processors, and that employs hardware filter indicators (when available) to filter redundant applications of TM barriers, and that enables a compiled binary representation of the subject code to run correctly in any of the currently implemented set of transactional memory execution modes, including running the code outside of a transaction, and that enables the same compiled binary to continue to work with future TM implementations which may introduce as yet unknown future TM execution modes.
Public/Granted literature
- US20100332808A1 MINIMIZING CODE DUPLICATION IN AN UNBOUNDED TRANSACTIONAL MEMORY SYSTEM Public/Granted day:2010-12-30
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