Invention Grant
- Patent Title: Semiconductor device, circuit board, and electronic instrument
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Application No.: US12382050Application Date: 2009-03-06
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Publication No.: US08384213B2Publication Date: 2013-02-26
- Inventor: Nobuaki Hashimoto
- Applicant: Nobuaki Hashimoto
- Applicant Address: JP Tokyo
- Assignee: Seiko Epson Corporation
- Current Assignee: Seiko Epson Corporation
- Current Assignee Address: JP Tokyo
- Agency: Oliff & Berridge, PLC
- Priority: JP8-339045 19961204; JP8-356880 19961226
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A semiconductor device with a package size close to its chip size is, apart from a stress absorbing layer, such as to effectively absorb thermal stresses. A semiconductor device (150) has a semiconductor chip provided with electrodes (158), a resin layer (152) forming a stress relieving layer provided on the semiconductor chip, wiring (154) formed from the electrodes (158) to over the resin layer (152), and solder balls (157) formed on the wiring (154) over the resin layer (152); the resin layer (152) is formed so as to have a depression (152a) in the surface, and the wiring (154) is formed so as to pass over the depression (152a).
Public/Granted literature
- US20090174068A1 Semiconductor device, circuit board, and electronic instrument Public/Granted day:2009-07-09
Information query
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