Invention Grant
US08386745B2 I/O memory management unit including multilevel address translation for I/O and computation offload
有权
I / O存储器管理单元包括用于I / O和计算卸载的多级地址转换
- Patent Title: I/O memory management unit including multilevel address translation for I/O and computation offload
- Patent Title (中): I / O存储器管理单元包括用于I / O和计算卸载的多级地址转换
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Application No.: US12508882Application Date: 2009-07-24
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Publication No.: US08386745B2Publication Date: 2013-02-26
- Inventor: Andrew G. Kegel , Mark D. Hummel
- Applicant: Andrew G. Kegel , Mark D. Hummel
- Applicant Address: US CA Sunnyvale
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Meyertons Hood Kivlin Kowert & Goetzel
- Agent Stephen J. Curran
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
An input/output memory management unit (IOMMU) configured to control requests by an I/O device to a system memory includes control logic that may perform a two-level guest translation to translate an address associated with an I/O device-generated request using translation data stored in the system memory. The translation data includes a device table having a number of entries. The control logic may select the device table entry for a given request by the using a device identifier that corresponds to the I/O device that generates the request. The translation data may also include a first set of I/O page tables including a set of guest page tables and a set of nested page tables. The selected device table entry for the given request may include a pointer to the set of guest translation tables, and a last guest translation table includes a pointer to the set of nested page tables.
Public/Granted literature
- US20110023027A1 I/O MEMORY MANAGEMENT UNIT INCLUDING MULTILEVEL ADDRESS TRANSLATION FOR I/O AND COMPUTATION OFFLOAD Public/Granted day:2011-01-27
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