Method of forming an electrical fuse and a metal gate transistor and the related electrical fuse

Invention Grant

US08399318B2 Method of forming an electrical fuse and a metal gate transistor and the related electrical fuse 有权

Title translation: 形成电熔丝和金属栅晶体管及相关电熔丝的方法

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Patent Title: Method of forming an electrical fuse and a metal gate transistor and the related electrical fuse
Patent Title (中): 形成电熔丝和金属栅晶体管及相关电熔丝的方法
Application No.: US13469069

Application Date: 2012-05-10
Publication No.: US08399318B2

Publication Date: 2013-03-19
Inventor: Yung-Chang Lin , Kuei-Sheng Wu , Chang-Chien Wong
Applicant: Yung-Chang Lin , Kuei-Sheng Wu , Chang-Chien Wong
Applicant Address: TW Hsinchu
Assignee: United Microelectronics Corp.
Current Assignee: United Microelectronics Corp.
Current Assignee Address: TW Hsinchu
Agent Ding Yu Tan
Main IPC: H01L21/8238
IPC: H01L21/8238

Method of forming an electrical fuse and a metal gate transistor and the related electrical fuse

Abstract:

The present invention provides a method of integrating an electrical fuse process into a high-k/metal gate process. The method simultaneously forms a dummy gate stack of a transistor and a dummy gate stack of an e-fuse; and simultaneously removes the polysilicon of the dummy gate stack in the transistor region and the polysilicon of the dummy gate stack in the e-fuse region. Thereafter, the work function metal layer disposed in the opening of the e-fuse region is removed; and the opening in the transistor region and the opening in the e-fuse region with metal conductive structures are filled to form an e-fuse and a metal gate of a transistor.

Abstract(Chinese):

本发明提供了一种将电熔丝工艺集成到高k /金属栅极工艺中的方法。该方法同时形成晶体管的虚拟栅极堆叠和电子熔丝的虚拟栅极堆叠; 并且同时去除晶体管区域中的虚拟栅极堆叠的多晶硅和电子熔丝区域中的伪栅极堆叠的多晶硅。此后，去除设置在电熔丝区域的开口中的功函数金属层; 并且晶体管区域中的开口和具有金属导电结构的e熔丝区域中的开口被填充以形成晶体管的电熔丝和金属栅极。

Public/Granted literature

US20120225524A1 METHOD OF FORMING AN ELECTRICAL FUSE AND A METAL GATE TRANSISTOR AND THE RELATED ELECTRICAL FUSE Public/Granted day:2012-09-06

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS