Invention Grant
- Patent Title: Metal gate transistor and method for fabricating the same
- Patent Title (中): 金属栅极晶体管及其制造方法
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Application No.: US13304409Application Date: 2011-11-25
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Publication No.: US08404535B2Publication Date: 2013-03-26
- Inventor: Chih-Hao Yu , Li-Wei Cheng , Che-Hua Hsu , Cheng-Hsien Chou , Tian-Fu Chiang , Chien-Ming Lai , Yi-Wen Chen , Jung-Tsung Tseng , Chien-Ting Lin , Guang-Hwa Ma
- Applicant: Chih-Hao Yu , Li-Wei Cheng , Che-Hua Hsu , Cheng-Hsien Chou , Tian-Fu Chiang , Chien-Ming Lai , Yi-Wen Chen , Jung-Tsung Tseng , Chien-Ting Lin , Guang-Hwa Ma
- Applicant Address: TW Science-Based Industrial Park, Hsin-Chu
- Assignee: United Microelectronics Corp.
- Current Assignee: United Microelectronics Corp.
- Current Assignee Address: TW Science-Based Industrial Park, Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H01L21/28
- IPC: H01L21/28

Abstract:
A method for fabricating metal gate transistor is disclosed. First, a substrate having a first transistor region and a second transistor region is provided. Next, a stacked film is formed on the substrate, in which the stacked film includes at least one high-k dielectric layer and a first metal layer. The stacked film is patterned to form a plurality of gates in the first transistor region and the second transistor region, a dielectric layer is formed on the gates, and a portion of the dielectric layer is planarized until reaching the top of each gates. The first metal layer is removed from the gate of the second transistor region, and a second metal layer is formed over the surface of the dielectric layer and each gate for forming a plurality of metal gates in the first transistor region and the second transistor region.
Public/Granted literature
- US20120064679A1 METAL GATE TRANSISTOR AND METHOD FOR FABRICATING THE SAME Public/Granted day:2012-03-15
Information query
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