Invention Grant
US08420488B2 Method of fabricating high voltage device 有权
制造高压器件的方法

Method of fabricating high voltage device
Abstract:
A high voltage device is provided. The high voltage device includes a gate on a substrate, two source/drain regions in the substrate beside the gate, and a composite gate dielectric layer that includes at least two stacked continuous layers, extending from one side to another side of the gate. Wherein, the at least two stacked continuous layers is a combination of at least one thermal oxide layer and at least one chemical vapor deposited layer.
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