Invention Grant
- Patent Title: System on a chip with interleaved sets of pads
- Patent Title (中): 系统在片上具有交错的焊盘组
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Application No.: US13170210Application Date: 2011-06-28
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Publication No.: US08476768B2Publication Date: 2013-07-02
- Inventor: Ajay Kumar , Sahil S. Dabare , Ajay K. Gaite , Shyam S. Gupta
- Applicant: Ajay Kumar , Sahil S. Dabare , Ajay K. Gaite , Shyam S. Gupta
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Charles Bergere
- Main IPC: H01H79/00
- IPC: H01H79/00

Abstract:
A system on a chip (SOC) includes a physical interface having first and second sets of interface pads. Interface pads from the first set are interleaved with interface pads from the second set. Additionally, the SOC is arranged for operation with a superset die having first and second personalities and has a physical interface with interface pads. The SOC uses a first number of interface pads in the first personality and a second number of interface pads in the second personality, where the first number is greater than the second number. A switch switches signals between the superset die and the physical interface and, in the second personality, switches signals to the physical interface so that interface pads in the second number of interface pads are interleaved with interface pads not in use in the second personality.
Public/Granted literature
- US20130001790A1 SYSTEM ON A CHIP WITH INTERLEAVED SETS OF PADS Public/Granted day:2013-01-03
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