Invention Grant
US08509017B2 Memory device and related operating methods 有权
内存设备及相关操作方法

Memory device and related operating methods
Abstract:
A memory device is provided that includes a memory cell, a voltage input, a plurality of bit lines, an amplifier connected to only a particular one of the bit lines, and a switch that is coupled to the amplifier and the voltage input. The switch is configured to prevent the voltage input from being electrically coupled to the amplifier when the plurality of bit lines are electrically floating.
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